1. Field of the Invention
The present invention relates to a semiconductor device such as an insulated-gate field-effect transistor (IGFET) having a Schottky junction, which prevents conduction in response to an application of a reverse voltage, and to a method of production thereof.
2. Description of the Related Art
IGFETs with large current-carrying capacities find extensive use as electric circuit switches. A typical IGFET has a source electrode in ohmic contact not only with a source region but also with a body (or base) region. A source-drain current path is therefore formed, which passes through a parasitic diode (known also as a body diode or inbuilt diode) due to a p-n junction formed between the drain and body regions, in addition to the current path through a conducting channel set up in the body region. In an n-channel IGFET the parasitic diode is inversely biased when the drain electrode is higher in potential than the source electrode, so that there is then no current path through the parasitic diode. However, the electric circuit incorporating the IGFET may require the drain electrode to be less in potential than the source electrode. The parasitic diode will then be forward biased, permitting current flow therethrough. When used for switching an inverter (dc-to-ac converter) circuit, such an IGFET offers the benefit of providing a regenerative current path through the parasitic diode.
Some electric circuits, however, require elements to resist current flow through parasitic diodes. This demand has so far been met by connecting the IGFET in series with an external diode, which has an in inverse polarity to the parasitic diode. The external diode performs a reverse blocking function, preventing current flow through the IGFET when the drain electrode grows is placed in lower potential than the source electrode. An objection to use of the external diode is that when built on the identical substrate where the IGFET is formed, it necessarily requires a greater size of the substrate and increases the production cost. If fabricated on separate substrates, on the other hand, an electric circuit, in which both the IGFET and external diode are incorporated, as a whole will be more bulky and expensive. A further disadvantage is a power loss incurred as current common to that flowing the IGFET is made to flow through the external diode. As an additional drawback, the current through the IGFET is uncontrollable during application of a reverse voltage when the drain electrode is lower in potential than the source electrode.
Designed to defeat all these difficulties associated with the external diode is the planer IGFET described and claimed in Japanese Unexamined Patent Publication No. 7-15009, in which the source electrode makes Schottky contact with the body region. This prior art planer IGFET is illustrated in FIG. 1 of the drawings attached hereto, and its equivalent circuit in FIG. 2.
A planer IGFET of the prior art illustrated in FIG. 1 has a substrate 1 of semiconductor silicon material, a drain electrode 2, a source electrode 3, a gate electrode 4, and a gate insulator film 5. The semiconductor silicon substrate 1 is variously doped to include an n+-type first drain region 6 with a high impurity concentration, an n−-type second drain (or drift) region 7 with a low impurity concentration, a p-type first body (or base) region 8, a p−-type second body (or base) region 9 with an impurity concentration less than that of the first body region 8, and an n+-type source region 10 with a relatively high impurity concentration. The substrate 1 is formed to provide a pair of major surfaces 1a and 1b opposite to each other. The drain electrode 2 is formed on the second major surface 1b of the substrate 1 in ohmic (low resistance) contact with the first drain region 6. Formed on the first major surface 1a of the substrate 1, the source electrode 3 makes ohmic contact with the n+-type source region 10 and Schottky contact with the p−-type second body region 9. The gate electrode 4 is disposed opposite both p-type first body region 8 and p−-type second body region 9 via the gate insulator film 5.
When a voltage is impressed on the source-drain electrodes so as to keep the drain electrode 2 higher in potential than the source electrode 3, and a voltage is impressed between the gate electrodes 3 and 4 so as to cause conduction through the IGFET, a conducting n-type channel 11, as indicated by dashed lines in FIG. 1, will be formed near the exposed surfaces of the first and the second body regions 8 and 9. Thus the drain current will then flow along the path through the drain electrode 2, first drain region 6, second drain region 7, channel 11, n+-type source region 10, and source electrode 3.
As shown in FIG. 2 which is an equivalent circuit, the planer IGFET of FIG. 1 comprises first and second p-n junction diodes D1 and D2 and a Schottky barrier diode D3 in addition to the FET switch Q1. The first p-n junction diode D1 is a parasitic (inbuilt) diode due to the p-n junction between the n−-type second drain region 7 and the p-type first body region 8. The second p-n junction diode D2 is another parasitic diode due to the p-n junction between the p−-type second body region 9 and the n+-type source region 10. The Schottky barrier diode D3 is formed by the Schottky junction between the source electrode 3 and the p−-type second body region 9. Connected in inverse parallel with the FET switch Q1, the first p-n junction diode D1 is so polarized as to be inversely biased when the drain electrode 2 is higher in potential than the source electrode 3. The second p-n junction diode D2 is connected in inverse series with the first p-n junction diode D. In an IGFET of a typical conventional type having no such Schottky barrier diode, a part corresponding to the Schottky barrier diode is made into a short-circuit state. Consequently, in such a conventional IGFET, an equivalent to the second p-n junction diode D2 serves no function whatsoever and thus will not be reflected in an equivalent circuit. The Schottky barrier diode D3 is connected in inverse series with the first p-n junction diode D1 and in parallel with the second p-n junction diode D2.
As, in the IGFET of FIGS. 1 and 2, the first p-n junction diode D1 is then inversely biased and the Schottky barrier diode D3 forward biased when the drain electrode 2 is higher in potential than the source electrode 3, the IGFET is capable of operating in a way similar to the operates like an IGFET of a typical conventional type. On the other hand, as both second p-n junction diode D2 and Schottky barrier diode D3 are inversely biased when the drain electrode 2 is lower in potential than the source electrode 3, reverse current flow through any part in the IGFET except the channel 11 is blocked.